IS61WV12816BLLIS64WV12816BLL128K x 16 HIGH-SPEED CMOS STATIC RAMISSIFEBRUARY 2006®
FEATURES•High-speed access time:12 ns: 3.3V + 10%15 ns: 2.5V-3.6V•Operating Current: 25mA (typ.)•Stand by Current: 400µA(typ.)•TTL and CMOS compatible interface levels•Fully static operation: no clock or refreshrequired•Three state outputs•Data control for upper and lower bytes•Industrial and Automotive temperatures avail-able•Lead-free availableDESCRIPTIONThe ISSI IS61WV12816BLL and IS64WV12816BLL arehigh-speed, 2,097,152-bit static RAM organized as 131,072words by 16 bits. They are fabricated using ISSI's high-performance CMOS technology. This highly reliable processcoupled with innovative circuit design techniques, yieldsaccess times as fast as 12 ns with low power consumption.When CE is HIGH (deselected), the device assumes astandby mode at which the power dissipation can bereduced down with CMOS input levels.Easy memory expansion is provided by using Chip Enableand Output Enable inputs, CE and OE. The active LOWWrite Enable (WE) controls both writing and reading of thememory. A data byte allows Upper Byte (UB) and LowerByte (LB) access.The IS61WV12816BLL and IS64WV12816BLL are packagedin the JEDEC standard 44-pin TSOP (Type II) and 48-pinmini BGA (6mm x 8mm).FUNCTIONAL BLOCK DIAGRAMA0-A16DECODER128Kx16MEMORY ARRAYVDDGNDI/O0-I/O7Lower ByteI/O8-I/O15Upper ByteI/ODATACIRCUITCOLUMN I/OCEOEWEUBLBCONTROLCIRCUITCopyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liabilityarising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on anypublished information and before placing orders for products.Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev.C02/03/06
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IS61WV12816BLLIS64WV12816BLL
TRUTH TABLE
Mode
Not SelectedOutput DisabledRead
WEXHXHHHLLL
CEHLLLLLLLL
OEXHXLLLXXX
LBXXHLHLLHL
UBXXHHLLHLL
I/O PIN
I/O0-I/O7I/O8-I/O15High-ZHigh-ZHigh-ZDOUTHigh-ZDOUTDINHigh-ZDIN
High-ZHigh-ZHigh-ZHigh-ZDOUTDOUTHigh-ZDINDIN
ISSI
VDD CurrentISB1, ISB2
ICC
ICC
®
WriteICC
PIN CONFIGURATION44-Pin TSOP (Type II) (T)
PIN DESCRIPTIONS
A0-A16
Address InputsData Inputs/OutputsChip Enable InputOutput Enable InputWrite Enable Input
Lower-byte Control (I/O0-I/O7)Upper-byte Control (I/O8-I/O15)No ConnectionPowerGround
I/O0-I/O15CEOEWELBUBNCVDDGND
A4A3A2A1A0CEI/O0I/O1I/O2I/O3VDDGNDI/O4I/O5I/O6I/O7WEA16A15A14A13A121234567891011121314151617181920212244434241403938373635343332313029282726252423A5A6A7OEUBLBI/O15I/O14I/O13I/O12GNDVDDI/O11I/O10I/O9I/O8NCA8A9A10A11NC2Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. C02/03/06
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IS61WV12816BLLIS64WV12816BLL
PIN CONFIGURATION
48-Pin mini BGA (B)
1 2 3 4 5 6ISSI
PIN DESCRIPTIONS
A0-A16I/O0-I/O15CE
Address InputsData Inputs/OutputsChip Enable InputOutput Enable InputWrite Enable Input
Lower-byte Control (I/O0-I/O7)Upper-byte Control (I/O8-I/O15)No ConnectionPowerGround
®
ABCDEFGHLBI/O8I/O9GNDVDDI/O14I/O15NCOEUBI/O10I/O11I/O12I/O13NCA8A0A3A5NCNCA14A12A9A1A4A6A7A16A15A13A10A2CEI/O1I/O3I/O4I/O5WEA11NCI/O0I/O2VDDGNDI/O6I/O7NCOEWELBUBNCVDDGND
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev. C02/03/06
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IS61WV12816BLLIS64WV12816BLL
ABSOLUTE MAXIMUM RATINGS(1)
SymbolVDDVTERMTSTGPTNote:Parameter
Power Supply Voltage Relative to GNDTerminal Voltage with Respect to GNDStorage TemperaturePower Dissipation
Value–0.5 to 4.0V–0.5 to VDD + 0.5–65 to + 150
1.0
UnitVV°CW
ISSI
®
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This isa stress rating only and functional operation of the device at these or any other conditions above those indicated in the opera-tional sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods mayaffect reliability.
OPERATING RANGE (VDD)
RangeIndustrialAutomotive
Ambient Temperature
–40°C to +85°C–40°C to +125°C
VDD (15 nS)2.5V-3.6V2.5V-3.6V
VDD (12 nS)3.3V + 10%DC ELECTRICAL CHARACTERISTICS (Over Operating Range)VDD = 2.5V-3.6V
SymbolVOHVOLVIHVILILIILONote:
1.
VIL (min.) = –0.3V DC; VIL (min.) = –2.0V AC (pulse width - 2.0 ns). Not 100% tested.
VIH (max.) = VDD + 0.3V DC; VIH (max.) = VDD + 2.0V AC (pulse width - 2.0 ns). Not 100% tested.
Parameter
Output HIGH VoltageOutput LOW VoltageInput HIGH VoltageInput LOW Voltage(1)Input LeakageOutput Leakage
Test Conditions
VDD = Min., IOH = –1.0 mAVDD = Min., IOL = 1.0 mA
Min.1.8—2.0–0.3
Max.—0.4VDD + 0.30.411
UnitVVVVµAµA
GND ≤ VIN ≤ VDD
GND ≤ VOUT ≤ VDD, Outputs Disabled
–1–1
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)VDD = 3.3V + 10%SymbolVOHVOLVIHVILILIILONote:
1.
VIL (min.) = –0.3V DC; VIL (min.) = –2.0V AC (pulse width - 2.0 ns). Not 100% tested.
VIH (max.) = VDD + 0.3V DC; VIH (max.) = VDD + 2.0V AC (pulse width - 2.0 ns). Not 100% tested.
Parameter
Output HIGH VoltageOutput LOW VoltageInput HIGH VoltageInput LOW Voltage(1)Input LeakageOutput Leakage
Test Conditions
VDD = Min., IOH = –4.0 mAVDD = Min., IOL = 8.0 mA
Min.2.4—2–0.3
Max.—0.4VDD + 0.30.811
UnitVVVVµAµA
GND ≤ VIN ≤ VDD
GND ≤ VOUT ≤ VDD, Outputs Disabled
–1–1
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IS61WV12816BLLIS64WV12816BLL
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
SymbolICCParameterVDD OperatingSupply CurrentTest ConditionsVDD = Max., CE = VILIOUT = 0 mA, f = Max.Com.Ind.Autotyp.(2)Com.Ind.AutoCom.Ind.Autotyp.(2) -12nsMin.Max.————————3540252020750900400ISSI
-15 nsMin.Max.———————————303540202020307509006400UnitmA®
ISB1TTL StandbyCurrent(TTL Inputs)CMOS StandbyCurrent(CMOS Inputs)VDD = Max.,VIN = VIH or VILCE ≥ VIH, f = maxVDD = Max.,CE ≥ VDD – 0.2V,VIN ≥ VDD – 0.2V, orVIN ≤ 0.2V, f = 0mAISB2μAμAmAμANote:
1.At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.2.Typical values are measured at VDD=3.3V, TA=250C. Not 100% tested.
CAPACITANCE(1)
SymbolCINCOUTNote:
1. Tested initially and after any design or process changes that may affect these parameters.
ParameterInput CapacitanceInput/Output Capacitance
ConditionsVIN = 0VVOUT = 0V
Max.68
UnitpFpF
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AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall TimesInput and Output Timingand Reference Level (VRef)Output Load
Unit(2.5V-3.6V)0.4V to VDD-0.3V
1.5nsVDD/2See Figures 1 and 2
Unit(3.3V + 10%)0.4V to VDD-0.3V
1.5nsVDD/2 + 0.05See Figures 1 and 2
ISSI
®
AC TEST LOADS
319 Ω ZO = 50ΩOUTPUT50Ω 1.5V30 pFIncludingjig andscope3.3VOUTPUT5 pFIncludingjig andscope353 ΩFigure 1.Figure 2.
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
SymbolParameterRead Cycle TimeAddress Access TimeOutput Hold TimeCE Access TimeOE Access TimeOE to High-Z OutputOE to Low-Z OutputCE to High-Z OutputCE to Low-Z OutputLB, UB Access TimeLB, UB to High-Z OutputLB, UB to Low-Z Output-12 nsMin.Max.12—3———003—00—12—1255—5—55—-15 nsMin.Max.15—3———003—00—15—1576—6—76—UnitnsnsnsnsnsnsnsnsnsnsnsnstRCtAAtOHAtACEtDOEtHZOE(2)tLZOE(2)tHZCE(2)tLZCE(2)tBAtHZB(2)tLZB(2)Notes:
1.Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0V to3.0V and output loading specified in Figure 1.
2.Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
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IS61WV12816BLLIS64WV12816BLL
AC WAVEFORMS
READ CYCLE NO. 1(1,2) (Address Controlled) (CE = OE = VIL, UB or LB = VIL)
t RCADDRESSISSI
®
t AAt OHADOUTPREVIOUS DATA VALIDt OHADATA VALIDREAD1.epsREAD CYCLE NO. 2(1,3)
t RCADDRESSt AAOEt OHAt HZOEt DOECEt LZOEt LZCEt ACEt HZCELB, UBDOUTNotes:HIGH-Zt LZBt BADATA VALIDt HZB UB_CEDR2.eps1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CE, UB, or LB = VIL.3. Address is valid prior to or coincident with CE LOW transition.
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IS61WV12816BLLIS64WV12816BLL
WRITE CYCLE SWITCHING CHARACTERISTICS(1,3) (Over Operating Range)
SymbolParameterWrite Cycle TimeCE to Write EndAddress Setup Timeto Write EndAddress Hold from Write EndAddress Setup TimeLB, UB Valid to End of WriteWE Pulse Width (OE = HIGH)WE Pulse Width (OE = LOW)Data Setup to Write EndData Hold from Write EndWE LOW to High-Z OutputWE HIGH to Low-Z Output-12 nsMin.Max.128800981060—0——————————5—-15 nsMin.Max.1510100010101270—0——————————7—UnitnsnsnsnsnsnsnsnsnsnsnsnsISSI
®
tWCtSCEtAWtHAtSAtPBWtPWE1tPWE2tSDtHDtHZWE(3)tLZWE(3)Notes:
1.Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0V to3.0V and output loading specified in Figure 1.
2.The internal write time is defined by the overlap of CE LOW and UB or LB, and WE LOW. All signals must be in valid statesto initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referencedto the rising or falling edge of the signal that terminates the write.
3.Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
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IS61WV12816BLLIS64WV12816BLL
WRITE CYCLE NO. 1(1,2) (CE Controlled, OE = HIGH or LOW)
t WCADDRESSVALID ADDRESSISSI
®
t SACEt SCEt AWt PWE1t PWE2t PBWt HAWEUB, LBt HZWEDOUTDATA UNDEFINEDHIGH-Zt LZWEt SDDINt HDDATAIN VALIDUB_CEWR1.epsIntegrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev. C02/03/06
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IS61WV12816BLLIS64WV12816BLL
WRITE CYCLE NO. 2(1) (WE Controlled, OE = HIGH during Write Cycle)t WCADDRESSVALID ADDRESSISSI
®
t HAOECELOWt AWWEt PWE1t PBWt SAUB, LBt HZWEDOUTDATA UNDEFINEDHIGH-Zt LZWEt SDDINt HDDATAIN VALIDUB_CEWR2.epsWRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write Cycle)t WCADDRESSOECEVALID ADDRESSLOWt HALOWt AWWEt PWE2t PBWt SAUB, LBt HZWEDOUTDATA UNDEFINEDHIGH-Zt LZWEt SDDINt HDDATAIN VALIDUB_CEWR3.eps10Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. C02/03/06
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IS61WV12816BLLIS64WV12816BLL
WRITE CYCLE NO. 4 (LB, UB Controlled, Back-to-Back Write) (1,3)t WCADDRESSADDRESS 1ISSI
t WCADDRESS 2®
OEt SACELOWWEt HAt SAt PBWt PBWWORD 2t HAUB, LBWORD 1t HZWEDOUTDATA UNDEFINEDHIGH-Zt LZWEt HDDATAINVALIDt SDDINt SDDATAINVALIDt HDUB_CEWR4.epsNotes:1. The internal Write time is defined by the overlap of CE = LOW, UB and/or LB = LOW, and WE = LOW. All signals must bein valid states to initiate a Write, but any can be deasserted to terminate the Write. The tSA, tHA, tSD, and tHD timing isreferenced to the rising or falling edge of the signal that terminates the Write.
2. Tested with OE HIGH for a minimum of 4 ns before WE = LOW to place the I/O in a HIGH-Z state.
3. WE may be held LOW across many address cycles and the LB, UB pins can be used to control the Write function.
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IS61WV12816BLLIS64WV12816BLL
DATA RETENTION SWITCHING CHARACTERISTICS
SymbolParameterVDD for Data RetentionData Retention CurrentData Retention Setup TimeRecovery TimeTest ConditionSee Data Retention WaveformVDD = 2.0V, CE ≥ VDD – 0.2VSee Data Retention WaveformSee Data Retention WaveformOISSI
OptionsInd.AutoMin.1.8——0Typ.(1)—0.40.4——Max.3.60.96——UnitVmAmAnsns®
VDRIDRtSDRtRDRtRCNote 1: Typical values are measured at VDD = 3.3V, TA = 25C. Not 100% tested.DATA RETENTION WAVEFORM (CE Controlled)
tSDRVDDData Retention ModetRDRVDRCE ≥ VDD - 0.2VCEGND12Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. C02/03/06
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IS61WV12816BLLIS64WV12816BLL
ORDERING INFORMATION:
Industrial Range: –40°C to +85°C
Speed (ns)12 (151)
Order Part No.
IS61WV12816BLL-12BIIS61WV12816BLL-12BLIIS61WV12816BLL-12TIIS61WV12816BLL-12TLI
Package
mini BGA (6mm x 8mm)
mini BGA (6mm x 8mm), Lead-freePlastic TSOP (Type II)
Plastic TSOP (Type II), Lead-free
ISSI
®
Note:
1.Speed = 12ns for VDD = 3.3V + 10%. Speed = 15ns for VDD = 2.5V-3.6V
Automotive Range: –40°C to +125°C
Speed (ns)
15
Order Part No.
IS64WV12816BLL-15BA3IS64WV12816BLL-15TA3IS64WV12816BLL-15TLA3
Package
mini BGA (6mm x 8mm)Plastic TSOP (Type II)
Plastic TSOP (Type II), Lead-free
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev. C02/03/06
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PACKAGING INFORMATION
Mini Ball Grid Array
Package Code: B (48-pin)
Top View1 2 3 4 5 6ISSI
Bottom Viewφ b (48x)®
6 5 4 3 2 1ABCDDEFGHD1eABCDEFGHeEE1A2SEATING PLANEA1ANotes:1. Controlling dimensions are in millimeters.mBGA - 6mm x 8mmMILLIMETERSSym.N0.LeadsAA1A2DD1EE1eb— 0.240.607.905.90mBGA - 8mm x 10mmINCHESMin.Typ.Max.Sym.N0.LeadsMILLIMETERMin.Typ.Max. 48— 0.240.609.907.90—————1.200.30—10.108.10—INCHESMin.Typ.Max.Min.Typ.Max.48—————1.200.30—8.106.10—0.0090.0240.3110.232 — ————0.0470.012—0.3190.240AA1A2DD1EE1eb — ————0.0470.012—0.3980.3190.0090.0240.3900.3115.25 BSC3.75 BSC0.75 BSC0.300.350.400.207 BSC0.148 BSC0.030 BSC0.0120.0140.0165.25 BSC3.75 BSC0.75 BSC0.300.350.400.207 BSC0.148 BSC0.030 BSC0.0120.0140.016Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any timewithout notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised toobtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774Rev.D01/15/03
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PACKAGING INFORMATION
Plastic TSOPPackage Code: T (Type II)ISSI
Notes:1.Controlling dimension: millimieters,unless otherwise specified.2.BSC = Basic lead spacingbetween centers.3.Dimensions D and E1 do notinclude mold flash protrusions andshould be measured from thebottom of the package.4.Formed leads shall be planar withrespect to one another within0.004 inches at the seating plane.®
NN/2+1E1E1DN/2ZDASEATING PLANE.ebA1LαCSymbolRef. Std.No. Leads (N)324450A—1.20—0.047—1.20—0.047—1.20—0.047A10.050.150.0020.0060.050.150.0020.0060.050.150.0020.006b0.300.520.0120.0200.300.450.0120.0180.300.450.0120.018C0.120.210.0050.0080.120.210.0050.0080.120.210.0050.008D20.8221.080.8200.83018.3118.520.7210.72920.8221.080.8200.830E110.0310.290.3910.40010.0310.290.3950.40510.0310.290.3950.405E11.5611.960.4510.46611.5611.960.4550.47111.5611.960.4550.471e1.27 BSC 0.050 BSC 0.80 BSC0.032 BSC0.80 BSC 0.031 BSCL0.400.600.0160.0240.410.600.0160.0240.400.600.0160.024ZD 0.95 REF 0.037 REF 0.81 REF 0.032 REF 0.88 REF 0.035 REFα0°5°0°5°0°5°0°5°0°5°0°5°MillimetersMinMaxInchesMinMaxPlastic TSOP (T - Type II)MillimetersInchesMinMaxMinMaxMillimetersMinMaxInchesMinMaxCopyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised toobtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev.F06/18/03
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